CD4553 3-Digit BCD Counter

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CD4553 is a 3−digit BCD counter that consists of 3 negative edges triggered BCD counters that are cascaded synchronously. A quad latch at the output of each counter permits storage of any given count. The information is then time division multiplexed, providing one BCD number or digit at a time. Digit select outputs provide display control. The 74LS04 IC has a wide range of working voltage, a wide range of working conditions, and directly interfaces with CMOS, NMOS, and TTL The IC also offers features such as ESD barring and thermal overload protection.

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What is BCD Counter?

A Binary TO Decimal Decoder converts coded inputs into coded outputs, where the input and output codes are different and decoders are available to “decode” either a Binary or BCD (8421 code) input pattern to typically a Decimal output code. A decoder’s output code usually has more bits than its input code, practical “binary decoder” circuits include 2-to-4, 3-to-8, and 4-to-16 line configurations. A BCD to Decimal Decoder consists of eight inverters and ten four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates.

CD4553 Key Feature

TTL Compatible Outputs
On−Chip Oscillator
Cascadable
Clock Disable Input
Pulse Shaping Permits Very Slow Rise Times on Input Clock
Output Latches
Master Reset
Pb−Free Packages are Available*

CD4553 Pinout

Pin No	Pin Name	Description
1	DS1′	Invert Digital Selection Pin 2
2	DS2′	Invert Digital Selection Pin 1
3	C1B	Cascading Input B
4	C1A	Cascading Input A
5	Q3	Output Pin 3 of the Counter
6	Q2	Output Pin 2 of the Counter
7	Q1	Output Pin 1 of the Counter
8	VSS	Source Supply
9	Q0	Output pin 0 of the counter
10	LE	Latch Enable Pin
11	DIS	Disable pin
12	CLK	Clock Signal Pin
13	MR	Master Reset Pin
14	O.F.	Overflow Pin
15	DS3′	Invert Digital Selection Pin 3
16	VDD	Drain Supply