27C040 4096K 100ns PLCC EPROM – Datasheet

1,157 views

The NM27C040 is a high-performance, 4,194,304-bit Electrically Programmable UV Erasable Read-Only Memory. It is organized as 512K words of 8 bits each. Its pin-compatibility with byte-wide JEDEC EPROMs enables upgrades through 8 Mbit EPROMs. The “Don’t Care” feature on VPP during reading operations allows memory expansions from 1M to 8 Mbits with no printed circuit board changes.

The NM27C040 provides microprocessor-based systems extensive storage capacity for large portions of operating system and application software. Its 120ns access time provides high-speed operation with high-performance CPUs. The NM27C040 offers a single chip solution for the code storage requirements of 100% firmware-based equipment. Frequently used software routines are quickly executed from EPROM storage, greatly enhancing system utility.

27C040 Pinout

27C040 Pin Configuration

Pin NumberPin NameDescription
1VPPProgramming Supply
2 A16 Address Input 16
3 A15 Address Input 15
4 A12 Address Input 12
5A7 Address Input 7
6A6 Address Input 6
7A5 Address Input 5
8A4 Address Input 4
9A3 Address Input 3
10A2 Address Input 2
11A1 Address Input 1
12A0 Address Input 0
13O0 Data Output 0
14O1 Data Output 1
15O2 Data Output 2
16VSSGround Pin
17O3 Data Output 3
18O4 Data Output 4
19O5 Data Output 5
20O6 Data Output 6
21O7 Data Output 7
22CE’ Chip Enable
23A10 Address Input 10
24OE’ Output Enable
25A11 Address Input 11
26A9 Address Input 9
27A8 Address Input 8
28A13 Address Input 13
29A14 Address Input 14
30A17 Address Input 17
31A18 Address Input 18
32VccPositive Power Supply

27C040 Key Features

  • High performance CMOS
    • 120, 150ns access time*
  • Simplified upgrade path
    • VPP is a “Don’t Care” during normal read operation
  • Manufacturer’s identification code
  • JEDEC standard pin configuration
    • 32-pin PDIP
    • 32-pin PLCC
    • 32-pin CERDIP

You can download this datasheet for 27C040 4096K 100ns PLCC EPROM – Datasheet from the link given below: